W03.2 Secure Emerging Architectures and Technologies
An Obfuscated 2-bit Adder/Half-Subtract Circuit with Reconfigurable Field Effect Transistors
Giulio Galderisi1, Niladri Bhattacharjee1, Marc Wijvliet2, Shubham Rai2, Akash Kumar3, Thomas Mikolajick1,4, Jens Trommer1
1NaMLab gGmbH, Dresden, Germany
2Chair of Processor Design, TU Dresden, Germany
3Chair of Embedded Systems, Ruhr University Bochum, Germany
4Chair of Nanoelectronics, TU Dresden, Germany
Designing Memory Protection for a RISC-V Nano-VP
Spandan Das, Christoph Lüth, Rolf Drechsler
Dept. Mathematics and Informatics, University of Bremen, Bremen, Germany
In-and-Beyond Boundaries: GPIO Signaling Research and Use-Cases with TrustZone
Christian Niesler1, Markus Ströhnisch1, Moritz Peters2, Tim Güneysu2, Lucas Davi1
1University of Duisburg-Essen, Essen, Germany
2Ruhr University Bochum, Germany